This invention relates to a piezoelectric oscillator accommodating a piezoelectric oscillating element in a cavity of a container unit and particularly to a piezoelectric oscillator suited to high-frequency oscillation utilizing overtone oscillation. Here, piezoelectric oscillating elements include those using a crystal substrate, a piezoelectric ceramic substrate and a monocrystalline piezoelectric substrate.
A crystal oscillator as an example of the piezoelectric oscillator is mounted in a mobile communication controller or a controller for controlling a LAN and is a very important component for generating an oscillation frequency for controlling such a controller. For example, the crystal oscillator used in the mobile communication controller or the like is required to extremely reduce its volume as the mobile communication controller is becoming smaller.
As a surface mount crystal oscillator for accomplishing such a miniaturization, for example, Japanese Unexamined Patent Publication No. 10-28024 discloses a construction in which a crystal oscillating element is mounted on the surface of a container unit comprised of a rectangular single-plate substrate and a frame-shaped leg portion and having a cavity whose opening is rectangular formed in its bottom surface, and a crystal oscillating element is mounted on the outer surface of the container unit while an IC chip is mounted in the cavity of the container unit.
FIGS. 23 to 26 show such a conventional surface mount crystal oscillator 150.
This crystal oscillator 150 is mainly comprised of a container unit 151, a rectangular crystal oscillating element 152, an IC chip 153 forming an oscillation control circuit, and a metallic lid 154.
This crystal oscillator 150 uses the container unit 151 in which a rectangular single-plate ceramic substrate 155 and a frame-shaped leg portion 156 are assembled into a unit, and a cavity 157 is formed in the bottom surface of this container unit 151.
The ceramic substrate 155 partitioning the outer surface of the container unit 151 and the bottom surface of the cavity 157 is formed with via hole conductors 158 for electrically connecting the outer surface of the ceramic substrate 155 and the bottom surface of the cavity 157. A sealing conductive pattern 159 for sealing the metallic lid 154 is formed on the outer surface of the ceramic substrate 155. Further, a wiring pattern 160 including IC electrode pads is formed on the bottom surface of the cavity 157, and external terminal electrodes 161 to 164 are formed on the four corners of the bottom surface of the frame-shaped leg portion 156.
The rectangular crystal oscillating element 152 is bonded on the outer surface of the container unit 151 via crystal oscillating element mounts 169, 170 using conductive adhesive materials 171, 172 so as to be electrically conductive. Further, the saucer-shaped metallic lid 154 is integrally joined using the sealing conductive pattern 159 in order to hermetically seal the crystal oscillating element 152. The IC chip 153 is accommodated in the cavity 157. This IC chip 153 is connected with the IC electrode pads as part of the wiring pattern 160 via bumps or bonding wires. The crystal oscillating element 152 mounted on the outer surface of the container unit 151 is connected with the IC chip 153 via the via hole conductors 158, and the IC chip 153 is connected with the external terminal electrodes 161 to 164 via the wiring pattern 160. A filling resin 173 is filled into the cavity 157 and cured therein. Thus, the IC chip 153 is completely covered by the filling resin 173 to have an improved humidity resistance.
However, the aforementioned conventional crystal oscillator is a relatively low-frequency oscillator used in an oscillation frequency band of a fundamental wave, e.g., a frequency band of about 13 MHz to 28 MHz. Thus, in the case of assuming a LAN 90 constructing a giga-bit ether net as shown in FIG. 27 for performing a high-speed communication processing of a large quantity of communication information including data such as sounds, still images and animated images, the communication controller using such a crystal oscillator has a problem in communication ability.
Specifically, in a network group A, a plurality of information terminals 91 provided with a communication ability of 10 Mbps are connected with a giga-bit ether net switch 95 via hubs 93. A plurality of information terminals 92 provided with a communication ability of 100 Mbps are connected with a giga-bit ether net switch 95A via 100M repeaters 94. The gaga-bit ether net switch 95A is connected with a server 96 provided with a communication ability of 1000 Mbps. Network groups B, C are similarly constructed. A gaga-bit ether net switch 95B of the network group B is connected with the gaga-bit ether net switch 95A via a router 97, whereas a gaga-bit ether net switch 95C of the network group C is connected with the gaga-bit ether net switch 95A via a router 98.
In the above LAN 90, a clock frequency of about 25 MHz is used in communications at locations indicated at ∘, and a clock frequency of about 125 MHz is used in communications at locations indicated at xe2x97xaf. The respective communication controllers necessitating a crystal oscillator for performing a high-frequency oscillation of 125 MHz is required to precisely process a huge amount of communication information of the entire network at high speeds. Further, in order to meet a demand for speeding up an information communication, crystal oscillators capable of performing high-frequency oscillation of 125 MHz or higher are becoming necessary.
On the other hand, among the characteristics of the crystal oscillator for the high-frequency oscillation used in the high-speed communication controller, a characteristic of a jitter J which is a phase variation of an oscillation waveform in every cycle t1 shown in FIG. 28 is essential in precisely processing an information.
The jitter J is described in detail. The jitter J is expressed as a total jitter TJ comprised of a jitter DJ which is a nonvariable component and a jitter RJ which is a variable component. In other words, a relationship defined by following equation (1) is satisfied:
TJ=DJ+14RJxe2x80x83xe2x80x83(1) 
Accordingly, the total jitter TJ can be suppressed by suppressing the jitter RJ to low level, and high-frequency oscillation utilizing overtone oscillation can be stably and satisfactorily performed. Specifically, a standard deviation "sgr" centered at 8 ns needs to be 10 ps or lower at a clock frequency of 125 MHz.
Since the aforementioned conventional crystal oscillator 150 is not provided with such a characteristic, it has been impossible to use it, for example, in a communication controller for precisely processing a huge amount of communication information of an entire network at high speeds as mentioned above.
Further, a ground potential for grounding an oscillating circuit needs to be stable for the precise and stable oscillation. If a ground pattern takes up a larger area for this purpose, it partly overlaps a wiring pattern for connecting a piezoelectric oscillating element with the oscillating circuit. A parasitic capacity occurring at the overlapping portion makes the oscillation unstable, thereby causing a problem of reduced oscillation characteristics.
Further, in the aforementioned conventional crystal oscillator 150, when plasma cleaning is applied to the wiring pattern 160 provided in the cavity 157 as shown in FIG. 25 before the connection by wire bonding, a conductive external matter removed from the outer surface of the wiring pattern 160 is adhered to the wiring pattern 160 again, thereby disadvantageously reducing connection by wire bonding between the IC chip 153 and the wiring pattern 160.
Further, in this crystal oscillator 150, the oscillating circuit of the crystal oscillating element 152 is formed by one IC chip 153 as shown in FIG. 26. Specifically, inverters 181, 182 for oscillation, a drain capacity capacitor Cd, a gate capacity capacitor Cg and a return resistor Rf are integrated into one IC chip 153. Thus, the IC chip 153 itself needs to be newly designed and replaced in the case that the oscillation characteristic of the crystal oscillator is desired to be changed. This is disadvantageous in versatility.
Furthermore, it is extremely difficult to accomplish stable operation of the crystal oscillator only by one IC chip 153. Specifically, it is necessary to cut a high-frequency noise superimposed on a supply voltage Vcc supplied from the external terminal electrode 161 as a Vcc supply terminal to the oscillating inverter integrated into the IC chip 153. In order to deal with such a necessity, an electronic component 183 which is a large-capacity bypass capacitor Cb is, for example, used. However, since it is difficult to integrate this capacitor 183 into the IC chip 153, it is usually provided on a printed circuit board on which the crystal oscillator is mounted. In such a case, if P, Q denote a connecting portion of a Vcc line and the capacitor 183 on the printed circuit board and a Vcc supplying electrode pad of the IC chip 153 (pad connected with the external terminal electrode 161 for Vcc), respectively, a physical distance between the connecting portion P and the pad Q is long, with the result that high-frequency noise is likely to superimpose. This also complicates external circuits of the printed circuit board and necessitates more time and work to mount the capacitor 183 on the printed circuit board.
Further, in the crystal oscillator in which the electronic component is mounted in the cavity, when a conductive resin paste or the like is applied to a device electrode pad provided on a mount surface, i.e., the bottom surface of the cavity, low molecular components contained in the conductive resin paste spreads on the wiring pattern on the mount surface, i.e., so-called bleedout occurs, thereby causing a problem of reduced connection by wire bonding between the IC chip and the wiring pattern.
In view of the problems residing in the prior art, it is an object of the present invention to provide a piezoelectric oscillator which has an excellent jitter characteristic of an oscillation waveform and can stably and satisfactorily perform high-frequency oscillation utilizing overtone oscillation.
It is another object of the present invention to provide a smaller piezoelectric oscillator whose characteristics can be easily changed and which are excellent in versatility and noise resistance.
It is still another object of the present invention to provide a smaller piezoelectric oscillator which can suppress occurrence of a parasitic capacity at a wiring pattern for connecting an piezoelectric oscillating element with an oscillating circuit and a ground pattern, stabilizing a ground potential, and performing a precise and stable oscillation having an excellent noise resistance.
It is yet still another object of the present invention to provide a piezoelectric oscillator which can improve connection reliability of an IC chip and a wiring pattern by wire bonding.
It is further another object of the present invention to provide a piezoelectric oscillator method which can assure manufacturing of such a piezoelectric oscillator at a high efficiency.
According to an aspect of the present invention, a piezoelectric oscillator comprises: a container unit having a partition wall partitioning an upper cavity and a lower cavity; a piezoelectric oscillating element accommodated in the upper cavity; an IC chip and an electronic component accommodated in the lower cavity and forming an oscillating circuit; external terminals provided at a periphery of a bottom of the container unit and connected with the oscillating circuit.
The partition wall may be provided with a jitter reducing structure for reducing jitter components of an oscillation wave outputted from an output terminal of the external terminals.
Also, the oscillating circuit may oscillate utilizing an overtone of the third or higher harmonic of the piezoelectric oscillating element.
Further, it may be appreciated that the partition wall is formed by a plurality of insulating layers placed one over another, and a ground pattern is arranged between the insulating layers for grounding the oscillating circuit, and a wiring pattern is arranged on a lower principle surface of the partition wall for connecting the piezoelectric oscillating element with the oscillating circuit. The ground pattern and the wiring pattern are arranged in such a relationship as to suppress occurrence of a parasitic capacity.
According to another aspect of the present invention, a method for manufacturing a piezoelectric oscillator, comprises the steps of: forming a container unit having a partition wall partitioning an upper cavity and a lower cavity; mounting a piezoelectric oscillating element in the upper cavity; and mounting an IC chip and an electronic component in the lower cavity.
These and other objects, features and advantages of the present invention will become more apparent upon a reading of the following detailed description and accompanying drawings.